1. Field of the Invention
The present invention relates to an apparatus and method for forward error correction (FEC), and more particularly to an apparatus and method for forward error correction that occurs in a variable code length.
2. Description of the Related Art
Due to current trend of rapidly growing multimedia demands, the need for a mass storage transmission system is increasing fast. A major role of the mass storage transmission system is performing a FEC (Forward Error Correction) operation, which includes detecting and correcting an error generated during the signal transmission back to an original state. Currently, numerous types of FEC devices have been introduced in the form of a chip. In most conventional FEC devices, the length of overhead added on a payload may be variable in response to an adapted algorithm, so that a line rate (i.e., transmission rate) for carrying out an error correction can be also varied in response to the adapted algorithm. As such, it is impossible to establish a mutual signal exchange protocol between optical networks using the conventional FEC chips.
FIG. 1 is a simplified block diagram illustrating a conventional FEC system used in processing a fixed transmission rate. As shown in FIG. 1, the conventional FEC system comprises a pre-amplifier PIN/PreAmp 100, an amplifier (Limiting Amplifier) 110, a FEC (Forward Error Correction) module 120, an EAM-LD 130, a controller 140, and a clock generator (Clock Box) 150. In operation, the pre-amplifier PIN/PreAmp 100 and the amplifier (Limiting Amplifier) 110 amplify input signals to a predetermined signal level, respectively. Then, the FEC module 120 performs a FEC operation on the input signals according to the control signals of the clock generator (Clock Box) 150 and the controller 140. The controller 140 controls the overall operation of the clock generator (Clock Box) 150 and the FEC module 120. The output signal of the FEC module 120 is an error-corrected signal, and the EAM-LD 130 converts the output signal of the FEC module 120 to an optical signal.
The output signals transmitted from the system of FIG. 1 are typically transmitted/received at a predetermined transmission rate. To achieve this, the controller 140 presets the predetermined transmission rate in the clock generator (Clock Box) 150, and the clock generator (Clock Box) 150 generates clock signals corresponding to the predetermined transmission rate. However, as the conventional FEC systems are only operable at a predetermined transmission rate, they cannot recognize a data frame coming at a different transmission rate. According, they must be manually adjusted to the different transmission rate to establish synchronization each time.